Deep silicon etching is important for 3D integrated circuit (3D-IC) design, microelectronic machine systems (MEMS), and power device manufacturing. For 3D-IC, multi-dies (devices) will be stacked vertically to realize the “minimum size” of device. Deep etching aims to create the hole/via followed by filling conductive metal to realize communication between stacks (also called Through Silicon Via). For MEMS, different kinds of sensors have different structures with high aspect ratios. Power devices, such as super junction diodes, also need deep trench etching.
Deep reactive ion etching (DRIE) is used to form such high aspect ratio structures (normally >15:1 will be required for future technologies). The industry has adopted the switchable Bosch process, which cyclically supplies an etching gas (SF6) followed by a sidewall passivation gas (cC4F8) (see, e.g., U.S. Pat. Nos. 5,501,893, 6,531,068, and 6,284,148). This process provides high selectivity and high etch rates. However, a non-uniform etching rate is observed between structures having different aspect ratios (also called RIE lag or aspect ratio dependent etching) due to the physical difficulty the ions/species have reaching the bottom of high aspect ratio holes/vias utilized in future technologies such as 3D-IC and MEMS. JVST A 24, 1283, 2006. The smaller size opening also makes deep etching more difficult. Owen et al., IEEE MEMS 2012. In other words, the higher aspect ratio and the narrower the hole, the slower etch rate using the Bosch process. Another disadvantage of Bosch process is that the polymer residue is difficult to remove after etching. Journal of the Korean Physical Society, 49 (2006) 1991-1997.
In current industry applications, especially MEMS, etch stop layers may be provided at the bottom of a silicon layer to physically reach same etch depth for different opening sizes. JVST A 24, 1283, 2006.
Another solution tunes the etching parameters. WO 2009/036053 to LAM Research Corp discloses changing substrate bias in the Bosch process as a solution of RIE lag. WO2009/036053 also replaces SF6 in the Bosch process with NF3 or CHF3 and cC4F8 with CF4.
US2013/105947 to Fuller et al. discloses a hydrofluorocarbon gas employed as a polymer deposition gas in an anisotropic etch process which alternates between use of an etchant gas and the polymer deposition gas to etch a deep trench in a semiconductor substrate.
WO2014/070838, having the same assignee as the present application, discloses etching fluids for plasma etching channel holes, gate trenches, staircase contacts, capacitor holes, contact holes, etc., in Si-containing layers on a substrate.
WO2014/160910 to DuPont discloses hydrofluorolefin compositions useful for removing surface deposits in CVD chambers.
WO2015/035381, having the same assignee as the present application, discloses sulfur-containing compounds for plasma etching channel holes, gate trenches, staircase contacts, capacitor holes, contact holes, etc., in Si-containing layers and mask material.
U.S. Pat. No. 6,569,774 to Trapp (Micron) discloses a plasma etch process for forming a high aspect ratio contact opening through a silicon oxide layer using CxHyFz etch gases, wherein x is 1 to 2, y is 0 to 3, and z is 2x−y+2 or x is 3 to 6, y is 0 to 3, and z is 2x−y.
WO2010/100254 to Solvay Fluor GmbH discloses use of certain hydrofluoroalkenes for a variety of processes, including as an etching fluid for semiconductor etching or chamber cleaning. The hydrofluoroalkenes may include a mixture of at least one compound selected from each of the following groups a) and b):                a) (Z)-1,1,1,3-tetrafluorobut-2-ene, (E)-1,1,1,3-tetrafluorobut-2-ene, or 2,4,4,4-tetrafluorobut-1-ene, and        b) 1,1,1,4,4,4-hexafluorobut-2-ene, 1,1,2,3,4,4-hexafluorobut-2-ene, 1,1,1,3,4,4-hexafluorobut-2-ene, and 1,1,1,2,4,4-hexafluorobut-2-ene.        
A need remains for Bosch-type etching processes to form high aspect ratio apertures.